Vol. 63, No. 1, February 2017

Table of Contents

Front page:


In Memory:


Society Announcements:


Members & Chapters:

Dallas Chapter Activities:

Boston Chapter Activity:


RS Events & News:


Links:

DSC 2017

IEEE Conference on
Dependable and Secure Computing

August 7—10
Taipei • Taiwan

The IEEE Conference on Dependable and Secure Computing solicits papers, posters, practices, and experiences for presenting innovative research results, problem solutions, and new challenges in the field of dependable and secure computing. The whole spectrum of IT systems and application areas, including hardware design and software systems, with stringent relevant to dependability and security concerns are of interest to DSC. Authors are invited to submit original works on research and practice of creating, validating, deploying, and maintaining dependable and secure systems. The scope of DSC includes, but is not limited to, the following three categories:

Computer Systems, Networks, and Software

  • Advanced Persistent Threat (APT)
  • Big Data Analysis
  • Botnet and Intrusion Detection
  • Cryptographic Methods and Toolkits
  • Cyber attacks
  • Data/Information Reliability
  • Database Security and Privacy
  • Embedded Systems and IoT Devices
  • Experimentation, Measurement, and Assessment
  • Mobile and Cloud Computing
  • SDN and NFV

System Electronics, VLSI, and CAD

  • CAD Algorithms and Tools
  • Electronic Circuits and Systems
  • Fault-Tolerant Architectures and Designs
  • Industrial Design Experiences
  • Noise-Aware Designs
  • Power-Aware Designs
  • Soft-Error Analysis and Models
  • Stochastic Circuits and Systems
  • Temperature-Aware Designs
  • Variable-Latency Designs
  • Security Circuits, Designs and Detection

Experience and Practice

The DSC conference will also include a submission category for experience and practice papers on new findings in the two aforementioned categories. The PC will evaluate a submission to the experience and practice track with the understanding that it predominantly contributes to the VLSI/CAD design knowhow or the extension of the community’s knowledge about how the security protection of known techniques fares in real-world operations. Authors have to submit a short paper along with slides and an optional supplemental video to demonstrate the implementation and/or the practicability of the work. Topics of interest include, but are not limited to:

  • Attacks on Information Systems and Digital Storage
  • CSIRTs, Incident Analysis and Response
  • Hacking Techniques and Countermeasures
  • Honeypots/Honeynets
  • Malware Analysis and Reversing
  • Mobile Communications Security and Vulnerabilities
  • Newly discovered vulnerabilities
  • Offensive Information Technology
  • Reverse Engineering, Forensics, and Anti-Forensics
  • Spyware, Phishing and Distributed Attacks
  • VLSI/CAD Design Knowhow

Manuscript submission

Papers should describe the original work with focus details. It should be no more than 8 pages for regular papers and 2 pages for experience and practice papers. Each submission will only be considered for one track - either the main conference track or the experience track, but not both. Papers must be written in English conforming to the IEEE standard conference format (US letter, two-column). All submitted papers will be peer-reviewed. Accepted papers will appear in the conference proceedings and will be submitted for inclusion in the IEEE Xplore digital library.

Important dates (updated)

Abstract submission due: March 25, 2017
Paper submission due: March 31, 2017
Notification of paper acceptance: May 10, 2017
Workshop/Poster submission due: May 17, 2017
Notification of poster acceptance: May 24, 2017
Camera ready: May 28, 2017

For more information, please visit the conference website at http://dsc17.cs.nctu.edu.tw/, or contact Professor Shiuhpyng Shieh, Chair, Steering Committee at ssp@cs.nctu.edu.tw or Professor Wen-Guey Tzeng, General Chair at wgtzeng@cs.nctu.edu.tw. The CFP is also available in PDF format.